Freescale Semiconductor MCF5480 - Manual (Page 66)

MCF548x Reference Manual, Rev. 3
1-8 Freescale Semiconductor
1.4.6 Communications I/O Subsystem
1.4.6.1 DMA Controller
The communications subsystem contains an intelligent DMA unit that provides front line interrupt control
and data movement interface via a separate peripheral bus to the on-chip peripheral functions, leaving the
processor core free to handle higher level activities. This concurrent operation enables a significant boost
in overall system performance.
The communications subsystem can support up to 16 simultaneously enabled DMA tasks, with support for
up to two external DMA requests. It uses internal buffers to prefetch reads and post writes such that
bursting is used whenever possible. This optimizes both internal and external bus activity. The following
communications and computer control peripheral functions are integrated and controlled by the
communications subsystem:
• Up to two 10/100 Mbps fast Ethernet controllers (FECs)
• Optional universal serial bus (USB) version 2.0 device controller
• Up to four programmable serial controllers (PSCs)
• I
2
C peripheral interface
• DMA serial peripheral interface (DSPI)
• Two FlexCAN controller area network 2.0B controllers
1.4.6.2 10/100 Fast Ethernet Controller (FEC)
The FEC supports two standard MAC/PHY interfaces: 10/100 Mbps IEEE 802.3 MII and 10Mbps 7-wire
interface. The controller is full duplex, supports a programmable maximum frame length and
retransmission from the transmit FIFO following a collision.
Support for different Ethernet physical interfaces:
— 100 Mbps IEEE 802.3 MII
— 10 Mbps IEEE 802.3 MII
— 10 Mbps 7-wire interface
• IEEE 802.3 full-duplex flow control.
• Support for full-duplex operation (200 Mbps throughput) with a minimum system clock frequency
of 50 MHz.
• Support for half duplex operation (100 Mbps throughput) with a minimum system clock frequency
of 25 MHz.
• Retransmit from transmit FIFO following collision.
• Internal loopback for diagnostic purposes.
1.4.6.3 USB 2.0 Device (Universal Serial Bus)
The USB module implementation on the MCF548x product family provides all the logic necessary to
process the USB protocol as defined by version 2.0 specification for peripheral devices. It features the
following:
• High-speed operation up to 480 Mbps, full-speed operation at 12 Mbps, and low-speed operation
at 1.5 Mbps
• Physical interface on chip
• Bulk, interrupt, and isochronous transport modes.
• Six programmable in/out endpoints and one control endpoint