3 status register (pscsrn), Status register (pscsrn) -8, 3 status register (pscsr n ) – Freescale Semiconductor MCF5480 User Manual

Page 770

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MCF548x Reference Manual, Rev. 3

26-8

Freescale Semiconductor

26.3.3.3

Status Register (PSCSRn)

The PSCSR register indicates the status of the characters in the FIFO and the status of the transmitter and

receiver.

4

TXCTS

Transmitter clear-to-send (UART and SIR modes). If both TxCTS and TxRTS are enabled, TxCTS
controls the operation of the transmitter.
0 PSCnCTS has no effect on the transmitter.
1 Enables clear-to-send operation. The transmitter checks the state of PSCnCTS each time it is ready

to send a character. If PSCnCTS is asserted, the character is sent; if it is negated, the channel
PSCnTXD remains in the high state and transmission is delayed until PSCnCTS is asserted.
Changes in PSCnCTS as a character is being sent do not affect its transmission.

3–0

SB

Stop-bit length control (UART mode only). Selects the length of the stop bit appended to the transmitted
character. Stop-bit lengths of 9/16th to 2 bits are programmable for 6–8 bit characters. Lengths of 1
1/16th to 2 bits are programmable for 5-bit characters. In all cases, the receiver checks only for a high
condition at the center of the first stop-bit position, that is, one bit time after the last data bit or after the
parity bit, if parity is enabled.

If an external 1x clock is used for the transmitter, clearing bit 3 selects one stop bit and setting bit 3
selects two stop bits for transmission.

An external clock source can be used to generate the baud rate. This is done by configuring the
communications timer. Please refer to the about external clock sources. Also refer to

Table 26-6

.

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

R

RB_

NEOF

FE_

PHYERR

PE_

CRCERR

OE

TXEMP_

URERR

TX

RDY

FU

RX

RDY

CDE_

DEOF

ERR

0

0

0

0

0

0

W

Reset

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Reg

Addr

MBAR + 0x8604 (PSC0); 0x8704 (PSC1); 0x8804(PSC2); 0x8904 (PSC3)

Figure 26-4. PSC Status Register (PSCSRn)

Table 26-4. PSCMR2n Field Descriptions

Bits

Name

Description

SB

5

Bits

6–8

Bits

SB

5 Bits

6–8

Bits

SB

5–8

Bits

SB

5–8

Bits

0000 1.063 0.563

0100 1.313 0.813

1000

1.563

1100 1.813

0001 1.125 0.625

0101 1.375 0.875

1001

1.625

1101 1.875

0010 1.188 0.688

0110 1.438 0.938

1010

1.688

1110 1.938

0011 1.250 0.750

0111 1.500 1.000

1011

1.750

1111 2.000

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