Freescale Semiconductor MCF5480 - Manual (Page 784)

MCF548x Reference Manual, Rev. 3
26-22 Freescale Semiconductor
26.3.3.13 Output Port Bit Set (PSCOPSETn)
Output ports are asserted by writing to this register.
26.3.3.14 Output Port Bit Reset (PSCOPRESETn)
Output ports are negated by writing to this register.
RES
5–1 — Reserved, should be cleared.
0 CTS Current state of the PSCnCTS input
0 PSCnCTS is low
1 PSCnCTS is high
Table 26-18. PSCOPSETn Field Descriptions
Bits Name Description
7–1 — Reserved, should be cleared.
0 RTS This field is reserved in AC97 mode.
For all other modes, assert PSCnRTS output
0 No operation
1 Asserts output port PSCnRTS (PSCnRTS becomes 0).
7 6 5 4 3 2 1 0 Mode
R 0 0 0 0 0 0 0 UART /
Modems /
IrDA
W RTS
R 0 0 0 0 0 0 0 0
AC97
W
Reset 0 0 0 0 0 0 0 0
Reg
Addr
MBAR + 0x863C (PSC0); 0x873C (PSC1); 0x883C (PSC2); 0x893C (PSC3)
Figure 26-17. Output Port Bit Reset Register (PSCOPRESETn)
Table 26-19. PSCOPRESETn Field Descriptions
Bits Name Description
7–1 — Reserved, should be cleared.
0 RTS This field is reserved in AC97 mode.
For other modes, negate PSCnRTS output
1 Negates output port PSCnRTS (PSCnRTS becomes 1).
0 No operation
Table 26-17. PSCIPn Field Descriptions (Continued)
Bits Name Description