Freescale Semiconductor MCF5480 - Manual (Page 797)

Functional Description
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 26-35
26.4 Functional Description
This section provides a complete functional description of the module.
26.4.1 UART Mode
The universal asynchronous receiver and transmitter (UART) is commonly used to send low speed data
between devices. The term asynchronous is used because it is not necessary to send clocking information
along with the data being sent. UART data transfer is character based and the character format is shown in
the following figure.
Figure 26-27. Character Format in UART Mode
In UART mode, modem control port PSCnRTS and PSCnCTS are controlled by the PSC.
If the PSCnRTS is configured to show TxRTS by the control register PSCMR1 and PSCMR2, the
PSCnRTS is negated automatically by the transmitter. PSCnRTS is negated when the transmitter is
disabled and has finished sending data in the transmit buffer. PSCnRTS is asserted by writing to the
PSCOPSET register.
The PSCnCTS input is used to control the transmitter. When PSCnCTS is negated, to start new serial
transmission is disabled until the PSCnCTS is asserted again.
Table 26-36. PSCRLWFPn / PSCTLWFPn Field Descriptions
Bits Name Description
15–9 — Reserved, should be cleared.
8–0 LWFP Last write frame pointer. FIFO-maintained pointer which indicates the start of the last frame written
into the FIFO. This register can be read and written for debug purposes. For the frame retransmit
function, the LRFP indicates which point to begin retransmission of the data frame. For the frame
discard function, these bits divide the valid data region of the FIFO (the area between the read and
write pointers) into framed and unframed data. Data between the Last Frame Pointer and the write
pointer is data of an incomplete frame, while the data between the Last Frame Pointer and the read
pointer has been received as whole frames. When the FRMEN bit in the PSCRFCR or PSCTFCR
is not set, then this pointer has no meaning.
D0 D1 D2 D3 D4 D5 D6 D7
START
Bit
Parity
Bit
STOP
Bit