Freescale Semiconductor MCF5480 - Manual (Page 819)

MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 27-1
Chapter 27
DMA Serial Peripheral Interface (DSPI)
This chapter describes the use of the DMA serial peripheral interface (DSPI) implemented on the
MCF548x processor.
27.1 Overview
The DMA serial peripheral interface (DSPI) block provides a synchronous serial bus for communication
between an MCU and an external peripheral device. The DSPI supports up to eight queued SPI transfers
(four receive and four transmit) in the DSPI resident FIFOs eliminating CPU intervention between
transfers.
For queued operations, the SPI queues reside in system RAM that is external to the DSPI. Data transfers
between the queues and the DSPI FIFOs are accomplished through the use of a DMA controller or through
host software.
27.2 Features
The MCF548x DSPI supports these SPI features:
• Full-duplex, three-wire synchronous transfers
• Master and slave modes
• Buffered transmit operation using the Tx FIFO with depth of up to 4 entries
• Buffered receive operation using the Rx FIFO with depth of up to 4 entries
• Tx and Rx FIFOs can be disabled individually for low-latency updates to SPI queues
• Visibility into Tx and Rx FIFOs for ease of debugging
• Programmable transfer attributes on a per-frame basis:
— Eight transfer attribute registers
— Serial clock with programmable polarity and phase
— Various programmable delays
— Programmable serial frame size of 4 to 16 bits, expandable with software control
— Continuously held chip select capability
• Four peripheral chip selects, expandable to 15 with external demultiplexer
• Deglitching support for up to seven peripheral chip selects with external demultiplexer
• DMA support for adding entries to Tx FIFO and removing entries from Rx FIFO:
— Tx FIFO is not full (TFFF)
— Rx FIFO is not empty (RFDF)
• Six interrupt conditions:
— End of queue reached (EOQF)
— Tx FIFO is not full (TFFF)
— Transfer of current frame complete (TCF)
— Attempt to transmit with an empty Tx FIFO (TFUF)
— Rx FIFO is not empty (RFDF)
— Frame received while Rx FIFO is full (RFOF)
• Modified SPI transfer formats for communication with slower peripheral devices