Freescale Semiconductor MCF5480 - Manual (Page 855)

MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 28-1
Chapter 28
I
2
C Interface
28.1 Introduction
This chapter describes the I
2
C™ module, including I
2
C protocol, clock synchronization, and I
2
C
programming model registers. It also provides extensive programming examples.
28.1.1 Block Diagram
A block diagram of the I
2
C module is shown in Figure 28-1 .
Figure 28-1. I
2
C Block Diagram
Address
Compare
In/Out
Data
Shift
Start, Stop,
Input
Sync
Clock
Control
Registers and ColdFire Interface
Address Decode
I 2 C Address
Data MUX
SDA SCL
Address IRQ Data
and
Arbitration
Control
Register
Internal Bus
Register
(I2ADR)
I 2 C Frequency
Divider Register
(I2FDR)
I 2 C Data
I/O Register
(I2DR)
I 2 C Status
Register
(I2SR)
I 2 C Control
Register
(I2CR)
Functional
Module