Freescale Semiconductor MCF5480 - Manual (Page 869)

Initialization Sequence
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 28-15
28.5.3 Generation of STOP
A data transfer ends with a STOP signal generated by the ‘master’ device. A master transmitter can simply
generate a STOP signal after all the data has been transmitted.
For a master receiver to terminate a data transfer, it must inform the slave transmitter by not
acknowledging the last byte of data. The informing of the slave transmitter is done by two operations:
• Before reading the second to the last byte of data, the master receiver must set the transmit
acknowledge bit (TXAK).
• Before reading the last byte of data, the master receiver must write a zero to the master/slave mode
select bit (MSTA). This will generate the STOP signal.
The I
2
C interrupt bit (IIF) in the status register is set when an interrupt is pending, which will cause a
processor interrupt request if the interrupt enable bit (IIEN) in the control register is set. The IIF bit is set
when one of the following events occurs:
1. Complete one byte transfer (set at the falling edge of the ninth clock).
2. Receive a calling address that matches its own specific address in slave receive mode.
3. Arbitration is lost.
Following is an example that shows a master RX where NACK occurs and STOP is generated.
/*********************************************
* Master RX with interrupt function disabled *
**********************************************/
/* Receive data from slave and store in rx_buffer */
for (i=0; i<rx_byte_count; i++)
{
/* Wait for transfer to complete */
while (!(MCF_I2C_I2SR & MCF_I2C_I2SR_IIF) );
/* Clear IIF bit */
MCF_I2C_I2SR &= 0xFD;
/* Check for second-to-last and last byte transmission. After second-to-last byte is
received, the ACK bit must be disabled in order to signal the slave that the last byte
has been received. The actual NACK does not take place until after the last byte has been
received. */
if (i==(rx_byte_count-2))
{
/*Disable Acknowledge (set I2CR.TXAK) */
MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK;
}
if (i==(rx_byte_count-1))
{