23 fec receive fifo alarm register (fecrfar), Fec receive fifo alarm register (fecrfar) -31, Fecrfar) – Freescale Semiconductor MCF5480 User Manual
Page 961
Memory Map/Register Definition
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor
30-31
in-between the read and write pointers) into framed and unframed data. Data between the LWFP and write
pointer constitutes an incomplete frame, while data between the read pointer and the LWFP has been
received as whole frames. When FECRFCR[FRMEN] is not set, then this pointer has no meaning. The last
written frame pointer is reset to zero, and non-functional bits of this pointer will always remain zero.
30.3.3.23 FEC Receive FIFO Alarm Register (FECRFAR)
This pointer provides high level alarm information to the user and the comm bus interface. A high level
alarm reports lack of space. The alarm register defines the alarm threshold for the number of free bytes in
the FIFO. If there are less than FECRFAR[ALARM] free bytes in the FIFO, the FECRFSR[ALARM] bit
is set.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
LWFP
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reg
Addr
MBAR + 0x9194 (FEC0), 0x9994 (FEC1)
Figure 30-25. FEC Receive FIFO Last Write Frame Pointer Register (FECRLWFP)
Table 30-29. FECRLWFP Field Descriptions
Bits
Name
Descriptions
31–10
—
Reserved, should be cleared.
9–0
LWFP
Last write frame pointer. This pointer indicates the location of the next byte after the last frame that
has been completely written. If not frames have been written into the FIFO, LWFP indicates the first
byte location in the FIFO ( the reset state).