Freescale Semiconductor MCF5480 - Manual (Page 979)

Functional Description
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 30-49
Figure 30-41. Ethernet Address Recognition—Receive Block Decisions
30.4.7 Hash Algorithm
The hash table algorithm used in the group and individual hash filtering operates as follows. The 48-bit
destination address is mapped into one of 64 bits, which are represented by 64 bits stored in GAUR, GALR
(group address hash match) or IAUR, IALR (individual address hash match). This mapping is performed
by passing the 48-bit address through the FEC’s 32-bit CRC generator and selecting the 6 most significant
bits of the CRC-encoded result to generate a number between 0 and 63. The MSB of the CRC result selects
GAUR (MSB = 1) or GALR (MSB = 0). The least significant 5 bits of the hash result select the bit within
the selected register. If the CRC generator selects a bit that is set in the hash table, the frame is accepted;
otherwise, it is rejected.
For example, if eight group addresses are stored in the hash table and random group addresses are received,
the hash table prevents roughly 56/64 (or 87.5%) of the group address frames from reaching memory.
Those that do reach memory must be further filtered by the processor to determine if they truly contain
one of the eight desired addresses.
The effectiveness of the hash table declines as the number of addresses increases.
Accept/Reject
Broadcast Addr
?
?
PROM = 1
?
Receive
Address
True
NOTES:
BC_REJ - field in RCR register (BroadCast REJect)
False True
False
BC_REJ = 1
?
Frame
Hash Match
?
Exact Match
?
Pause Frame
False
False
False
False
True
True
True
True
Receive Frame Receive Frame
Receive Frame
Receive Frame
Reject Frame
Reject Frame
PROM - field in RCR register (PROMiscous mode)
Pause Frame - valid PAUSE frame received
Set BC bit in Rcv BD
Set MC bit in RFSW if multicast
Set M (Miss) bit in Rcv BD
Set MC bit in Rcv BD if multicast
Set BC bit in Rcv BD if broadcast
Recognition