Lapd data link/asynchronous controller, Counter/timer controller, Software interface circuit – Nortel Networks 1000 User Manual

Page 858

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NTAK93 D-channel Handler Interface daughterboard

A total of 32K bytes of ROM space for each pair of ports is reserved as a
code section of the DCH-PORT firmware.

LAPD data link/asynchronous controller

One chip controls each pair of independent communication ports.
It performs the functions of serial-to-parallel and parallel-to-serial
conversions, error detection, and frame recognition (in HDLC). The
parameters of these functions are supplied by the DCH-PORT firmware.

One chip controls each pair of independent communication ports.
It performs the functions of serial-to-parallel and parallel-to-serial
conversions, error detection, frame recognition (in HDLC) function. The
parameters of these functions are supplied by the DCH-PORT firmware.

One chip controls each pair of independent communication ports.
It performs the functions of serial-to-parallel and parallel-to-serial
conversions, error detection, and frame recognition (in HDLC). The
parameters of these functions are supplied by the DCH-PORT firmware.

Counter/timer controller

Two chips are used as real-time timers and baud-rate generators for each
pair of communication ports.

Two chips are used as real-time timers and baud-rate generators for each
pair of communication ports.

Two chips are used as real-time timers and baud-rate generators for each
pair of communication ports.

Software interface circuit

This portion of the circuit handles address/data bus multiplexing, the
interchange of data, commands, and status between the on board
processors and software. It includes transmit buffer, receive buffer,
command register, and status register for each communication channel.

This portion of the circuit handles address/data bus multiplexing, the
interchange of data, commands, and status between the on board
processors and software. It includes transmit buffer, receive buffer,
command register, and status register for each communication channel.

This portion of the circuit handles address/data bus multiplexing, the
interchange of data, commands, and status between the on board
processors and software. It includes transmit buffer, receive buffer,
command register, and status register for each communication channel.

Nortel Communication Server 1000

Circuit Card Reference

NN43001-311

02.06

Standard

27 August 2008

Copyright © 2003-2008 Nortel Networks

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