Cirrus Logic EP93xx - Manual (Page 101)

DS785UM1 3-31
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
EP93xx User’s Guide
3
3
3
Move from Control/Status Register to MaverickCrunch Register
Description:
Moves a 64-bit value from the MaverickCrunch Status/Control register,
DSPSC, to a MaverickCrunch register. CRn is ignored.
Mnemonic:
CFMV32SC<cond> CRd, CRn
Bit Definitions:
CRd: Destination register
3.5.4 Copy and Conversion Instructions
Copy Single Precision Floating Point
Description:
Copies a single precision floating point value from one register to another.
Mnemonic:
CFCPYS<cond> CRd, CRn
Bit Definitions:
CRd: Destination register
CRn: Source register
Copy Double Precision Floating Point
Description:
Copies a double precision floating point value from one register to another.
Mnemonic:
CFCPYD<cond> CRd, CRn
Bit Definitions:
CRd: Destination register
CRn: Source register
31:28 27:24 23:22 21:20 19:16 15:12 11:8 7:5 4 3:0
cond 1 1 1 0 0 0 0 1 CRn CRd 0 1 0 0 1 1 1 0 CRm
31:28 27:24 23:22 21:20 19:16 15:12 11:8 7:5 4 3:0
cond 1 1 1 0 0 0 0 0 CRn CRd 0 1 0 0 0 0 0 0 CRm
31:28 27:24 23:22 21:20 19:16 15:12 11:8 7:5 4 3:0
cond 1 1 1 0 0 0 0 0 CRn CRd 0 1 0 0 0 0 1 0 CRm