2 features, 3 raster engine features overview, 1 hardware blinking – Cirrus Logic EP93xx User Manual
Page 185: 1 hardware blinking -3
DS785UM1
7-3
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7
7
7
Since the frame buffer is stored in SDRAM memory, supporting displays with high frame rates
at high resolutions will not be practical and sometimes not possible without using displays
that have an integrated frame buffer.
7.2 Features
•
Hardware pixel blinking
•
Dual 256-color Look-up-tables (LUT)
•
Grayscale/Color Generation for Monochrome/Passive Low Color Displays
•
Flexible frame buffer architecture
•
Supports video information in DIB (Device Independent Bitmap) format
•
Hardware support for left and right panning of the displayed information
•
Supports screen sizes up to 1280 x 1024 pixels, with a pixel depth of 4 bpp, 8 bpp, 16
bpp, 24 bpp packed, or 32 bpp (24 bpp unpacked)
Note: Using the Maximum Resolution causes system performance to slow.
•
Pulse Width Modulated output that can be used to provide a DC voltage level for
brightness control
•
Hardware cursor support with bottom and right edge clipping performed by hardware
•
24-bit color depth, but only 18 bits is bond-out
7.3 Raster Engine Features Overview
7.3.1 Hardware Blinking
The raster engine pipeline contains hardware pixel blinking logic. This circuitry will blink
pixels based on the Rate field in the
register. For 4 bpp and 8 bpp modes, either
multiple or single bit planes may be used to specify blinking pixels by look up in the LUT. This
will allow the number of definable blinking pixels to range from all pixel combinations blinking
SXGA CRT
1280 x 1024
110
8, 16, or
24bpp
Analog
1
NA
70
External
DAC
HDTV-2 LCD
1280 x 720
50
8, 16, or 24
bpp
24-bit RGB
1
50
50
24-bits
HDTV-2 CRT
1280 x 720
66
8, 16, or 24
bpp
Analog
1
NA
60
External
DAC
Table 7-1. Raster Engine Video Mode Output Examples
Display
Type
Horizontal
Resolution
x
Vertical
Resolution
Video
Clock
Freq.
(MHz)
Frame
Buffer
Storage
Format
Display
Data
Format
Pixels
Per
Shift
Clock
Pixel
Shift
Clock
Freq.
(MHz)
Vertical
Frame
Rate
(Hz)
Notes