6 register usage, 1 breshenham’s algorithm line draw, 6 register usage -13 – Cirrus Logic EP93xx User Manual

Page 277: 1 breshenham’s algorithm line draw -13, Table 8-20

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DS785UM1

8-13

Copyright 2007 Cirrus Logic

Graphics Accelerator

EP93xx User’s Guide

8

8

8

Note:The word count for this example would be: 6 - 1 = 5 words, since P6 ends in the 6th word.

The word count takes into account the whole pixel, not just the starting location. So,
WIDTH = 0x5 would be written to the

“BLKDESTWIDTH”

register.

8.6 Register Usage

Since some registers have different meanings based on the type of transfer being performed,
the next section will give the use and meaning of the register during the various graphics
transfers.

8.6.1 Breshenham’s Algorithm Line Draw

The following sequence describes how to set up the registers that are used for a
Breshenham algorithm line draw:

1. Setup LINEINIT Register

Write YINIT = 0x800 (2048) and XINIT = 0x800 in the

“LINEINIT”

register.

2. Setup LINEPATTERN Register

A. Write desired values to the Pattern (PTRN) and Count (CNT) fields to create solid or

patterned lines. The

“LINEPATTRN”

register contains a 4-bit pattern Count (CNT)

value and a 16-bit Pattern (PTRN) that defines 16 pixel on/off patterns for line
functions. CNT specifies the position of the last bit used in the PTRN field starting at
bit 0 of the PTRN field.

B. For a solid line, write CNT = 0xF and PTRN = 0xFFFF to the

“LINEPATTRN”

register. The solid line will have the color value that is written to the MASK field in
the

“BLOCKMASK”

register.

C. For a pattern of 8 ‘on’ pixels and 8 ‘off’ pixels, write CNT = 0xF and PTRN = 0x00FF

to the

“LINEPATTRN”

register. The 8 ‘on’ pixels would have the color value that is

written to the MASK field in the

“BLOCKMASK”

register. The 8 ‘off’ pixels would

either be transparent as specified by BG = ‘0’ in the

“BLOCKCTRL”

register or have

the color value written to the

“BACKGROUND”

register as specified by BG = ‘1’ in

the

“BLOCKCTRL”

register. Using DX/DY line draw, the pattern will be more

consistent for any line regardless of angle.

Table 8-20. 24 BPP Memory Layout for Destination Image

Address

31

24

23

16

15

8

7

0

0x0058

P1

P0

P0

P0

0x005C

P2

P2

P1

P1

0x0060

P3

P3

P3

P2

0x0064

P5

P4

P4

P4

0x0068

P6

P6

P5

P5

0x006C

P7

P7

P7

P6

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