3 block fill function, 3 block fill function -16 – Cirrus Logic EP93xx User Manual

Page 280

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8-16

DS785UM1

Copyright 2007 Cirrus Logic

Graphics Accelerator
EP93xx User’s Guide

8

8

8

SPEL = [X2% 2 (pixel depth / 8-bit byte)] x 8 = [101% 2 (16-bits / 8-bits)] x 8-bits =

[101% 2] x 8 = 1 x 8 = 8 = 0x8, and

EPEL = [X1% 2 (pixel depth / 8-bit byte)] x 8 = [20% 2 (16-bits / 8-bits)] x 8-bits = [20%

2] x 8 = 0 x 0 = 0 = 0x0

5. Write the word-aligned value of the SDRAM address ‘for the beginning of the line draw’

to the

“BLKDESTSTRT”

register.

6. Write the desired background color value to the BG field in the

“BACKGROUND”

register. The ‘off’ pattern bits of the line will be displayed using the background color.

7. Write the desired foreground color value to the MASK field in the

“BLOCKMASK”

register. The ‘on’ pattern bits of the line will be displayed using the foreground color.

8. Write YINC = 0xFFF and XINC = 0x49C to the

“LINEINC”

register, where

YINC = 4095 = 0xFFF

XINC = [abs(X2 - X1) / abs(Y2 - Y1)] x 4095 = [abs(20 - 101) / abs(20-301)] x 4095 =

(81 / 281) x 4095 = 1180.409, which rounds to 1180 = 0x49C

9. Write WIDTH = 0x50 to the

“BLKDESTWIDTH”

:register, where

WIDTH = abs(X2 - X1)% 4096 - 1 = abs(20 - 101)% 4096 - 1 = 81% 4096 - 1 = 81 - 1 =

80 = 0x50

10. Write HEIGHT = 0x0 to the

“BLKDESTHEIGHT”

register, where

HEIGHT = [abs(Y2 - Y1) - 1] / 4096 = [abs(20 - 301) - 1]/ 4096 = (281 - 1) / 4096 =

0.0686 = 0x0

11. Clear the

“BLOCKCTRL”

register by writing 0x0000_0000 to it

12.Write Line = ‘1’, DXDIR = ‘0’, DYDIR = ‘0’, BG = ‘0’, P = 0x4, and INTEN = ‘1’ to the

“BLOCKCTRL”

register

13.Write EN = ‘1’ to the

“BLOCKCTRL”

register

14.Wait for an interrupt or poll for EN = ‘0’ in the

“BLOCKCTRL”

register. When the EN bit

becomes cleared to ‘0’, the Breshenham’s Algorithm line draw function is complete.

8.6.3 Block Fill Function

The following sequence describes how to carry out a Block Fill function:

1. Setup BLOCKMASK Register

Write the desired pixel-fill value to the MASK field in the

“BLOCKMASK”

register. The

pixel-fill value is dependant on the color depth.

2. Setup DESTPIXELSTRT Register

Write the desired values to the SPEL field and the EPEL field in the

“DESTPIXELSTRT”

register.

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