Vidscrnhpage, Rsvd : reserved - unknown during read – Cirrus Logic EP93xx User Manual
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DS785UM1
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7
7
7
Frame Buffer Memory Configuration Registers
VidScrnPage
Address: 0x8003_0028
Default: 0x0000_0000
Definition: Video Screen Page Register
Bit Descriptions:
RSVD:
Reserved - Unknown during read
PAGE:
Video Screen Page Starting SDRAM Address - Read/Write
Corresponds to the word address relative to the beginning
of SDRAM of the upper left corner of the video screen to
be scanned out. The absolute AHB address for the video
screen page is determined by the combination of this bit
field as well as the SDSEL bit held in the
register.
NA:
Not Assigned. Will return written value during a read.
VidScrnHPage
Address: 0x8003_002C
Default: 0x0000_0000
Definition: Video Screen Half Page Register
Bit Descriptions:
RSVD:
Reserved - Unknown during read
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
PAGE
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PAGE
NA
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
PAGE
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PAGE
NA