2 example of breshenham’s algorithm line draw, 2 example of breshenham’s algorithm line draw -15 – Cirrus Logic EP93xx User Manual
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DS785UM1
8-15
Copyright 2007 Cirrus Logic
Graphics Accelerator
EP93xx User’s Guide
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9. Setup BLKDESTWIDTH Register
Write ‘abs(X2 -X1) modulo 4096, minus 1’ to the WIDTH field in the
register.
10.Setup BLKDESTHEIGHT Register
Write ‘abs(Y2 - Y1) / 4096, minus 1’ to the HEIGHT field in the
register.
11.Setup BLOCKCTRL Register
A. Clear the
register by writing 0x0000_0000 to it.
B. Set the LINE bit to ‘1’
C. If X2 > X1, set the DXDIR bit to ‘1’, else set the DXDIR bit to ‘0’
D. If Y2 > Y1, set the DYDIR bit to ‘1’, else set the DYDIR bit to ‘0’
E. Either set the BG bit to ‘1’ to use the background color specified in
register or set the BG bit to ‘0’ for transparent background.
F. Set the P bits to the value for the desired BPP color depth
G. If interrupts are desired, set the INTEN bit to ‘1’
H. Set the EN bit to ‘1’
The final step is to wait for an interrupt or poll for EN = ‘0’ in the BLOCKCTRL register. When
the EN bit becomes cleared to ‘0’, the line draw function is complete.
8.6.2 Example of Breshenham’s Algorithm Line Draw
To achieve the following display and pattern, follow Steps 1 to 14 in this section.
•
Display size is 640 x 480 x 16-bits per pixel
•
Display memory starts at physical location 0x0000_0000
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Pattern is 8 transparent pixels and 8 white pixels
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X2 = 20, X1 = 101
•
Y2 = 20, Y1 = 301
The following sequence describes how to set up those registers that are used for a
Breshenham’s algorithm line draw.
1. Write XINIT = 0x800 (2048) and YINIT = 0x800 to the
register
2. Write PTTN = 0x00FF and CNT = 0xF to the
register
3. Write LEN = 0x140 to the
register, where LEN = 640 (pixels) x 1/2
(1 / # of 16-bit pixels in word) = 640 x 1/2 = 320 = 0x140
4. Write SPEL = 0x8 and EPEL = 0x0 to the
register, where: