Cirrus Logic EP93xx - Manual (Page 502)

13-6 DS785UM1
Copyright 2007 Cirrus Logic
SDRAM, SyncROM, and SyncFLASH Controller
EP93xx User’s Guide
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13.5 Programming Mode Register: SDRAM Or SyncROM Device
When setting up the Mode register that is inside an SDRAM or SyncROM device, or the
Configuration register that is inside a SyncFLASH device, the command word that is placed
on the address pins shown in
Table 13-5 depends on whether a SROM, SDRAM, or
SyncFlash is attached. Once Initialize = ‘0’, MRS = ‘1’, and LCR = ‘0’ are written to the
GlConfig register to enable access to the Mode register, the address of a subsequent Read
operation is output on AD[12:0]. The internal address, A[23:0], is mapped to external address
pins AD[12:0] as shown in
Table 13-5 .
In Table 13-5 , AD[2:0] represents the Burst Length (BL). The Burst Length for 32-bit
configurations must be set to four. The Burst Length for 16-bit configurations must be set to
eight. See
Table 13-8 for Burst Length values.
AD[3] specifies Burst Type (BT). A value of zero specifies Sequential, a value of one specifies
Interleaved.
AD[6:4] specifies CAS Latency (CASL). Only values of two or three are supported. See
Table 13-6 for CAS Latency values.
AD[8:7] specify Operation Mode (OM). This value must be zero for normal operation.
AD[9] specifies the Write Burst Mode (WBM). This value should be programmed to zero for
devices that support burst, such as SDRAM. It should be set to zero for devices that do not
support burst mode, such as SyncFlash or SyncROM.
AD[12:10] are reserved, but must be zero for normal operation.
Note: If using an external bus that is 16 bits wide then the address mapping must be shifted as
indicated by Table 13-3 on page 13-4 .
Note: For SDRAM, AD[2:0] specify burst length. For SROM, AD[1:0] specify burst length.
Table 13-5. Mode Register Command Decoding for 32-bit Wide Memory Bus
Address AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
Mapped addr for
default 32-bit
wide
A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
SDRAM or
SFLASH
RFU
Write
Burst
Mode
Operating
Mode
CAS Latency
Burst
Type
0 1 0
Example:
SDRAM with
WBM = 0,
OM= 0,
CASL = 3,
BT = Sequential,
BL = 4
0 0 0 0 0 0 0 1 1 0 0 1 0
SROM RFU RFU RAS CAS
Burst
Type
0 1
Example: SROM
RAS =2, CAS=2,
Sequential, BL=4
0 0 0 0 0 0 1 1 0 0 0 0 1