Cirrus Logic EP93xx - Manual (Page 282)

8-18 DS785UM1
Copyright 2007 Cirrus Logic
Graphics Accelerator
EP93xx User’s Guide
8
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7. Setup BLOCKCTRL Register
For (example) 16-bit pixels and Mask AND Mode:
A. Clear the “BLOCKCTRL” register by writing 0x0000_0000 to it
B. Write Fill = ‘1’, BG = ‘0’, M = 0x1, P = 0x4, and INTEN = ‘1’ to the “BLOCKCTRL”
register
C. Write EN = ‘1’ to the “BLOCKCTRL” register
8. Wait for an Interrupt or Poll for EN = ‘0’ in the BLOCKCTRL Register.
When the EN bit becomes cleared to ‘0’, the Block Fill Algorithm function is complete.
8.6.4 Block Copy Function
The following sequence describes how to set up the registers used for a Block Copy function:
1. Setup Source Memory
A. Write the desired values to the SPEL field and the EPEL field in the
“SRCPIXELSTRT” register.
SPEL is the starting pixel position within the word that the pixel-copy will begin with.
EPEL is the ending pixel position within the word that the pixel-copy will end with. See
Section 8.5.2 .
For example, if the image to be copied is at position (51, 75) and the pixel depth is 16-
bits, the value for SPEL is (51 x 16)% 32 = 16 = 0x10 and the value for EPEL is (75 x
16)% 32 = 16 = 0x10
B. Write the word-aligned value of the SDRAM address ‘for the beginning of the image
that is to be copied’ to the “BLKDESTSTRT” register.
C. Write the line length value to the LEN field in the “SRCLINELENGTH” register,
where LEN is determined by:
(1).Find how many pixels occupy a 32-bit word. For example, four 8-bit pixels can
occupy a 32-bit word.
(2).Find the width of the display in pixels. For example, a 640x480 display has a
width of 640 pixels.
(3).The line length, LEN, is determined by the stride of the display, that is, how
many 32-bit words are needed to populate the width of the display with pixels.
From steps 1 and 2, the stride for this example is 640 pixels divided by 4,
where 4 is the number of 8-bit pixels that occupy a word. So, for this example,
line length is 640 divided by 4 = 160 = 0xA0.
Usually the same LEN value is used in both the “SRCLINELENGTH” register
and the “DESTLINELENGTH” register.
D. Write the value of the WIDTH field to the “BLKSRCWIDTH” register, where WIDTH
is the number of 32-bit words, minus 1, that are needed to contain the pixels that