Cirrus Logic EP93xx - Manual (Page 733)

DS785UM1 24-1
Copyright 2007 Cirrus Logic
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Chapter 24
24 Pulse Width Modulator
24.1 Introduction
Note: The EP9307 processor has one PWM with one output, PWMOUT.
Note: The EP9301, EP9302, EP9312, and EP9315 processors each have two PWMs with
two outputs, PWMOUT and PWMO1. PWMO1 is an alternate function for EGPIO14.
The Pulse Width Modulators (PWMs) have the following features:
• Configurable dual output
• Separate input clocks for each PWM output
• 16-bit resolution
• Programmable synchronous mode support
• Allows external input to start PWM
• Programmable pulse width (duty cycle), interval (frequency), and polarity
• Static programming: PWM is stopped
• Dynamic programming: PWM is running
• Updates duty cycle, frequency, and polarity at end of a PWM cycle
24.2 Theory of Operation
Each PWM is an Advanced Microcontroller Bus Architecture (AMBA) compliant system-on-a
chip (SOC) peripheral. Each is a configurable dual-output, dual clock input AMBA slave
module, and each connects to the Advanced Peripheral Bus (APB). The PWM Interfaces
comply with the AMBA Specifications (Rev.2.0). This design assumes little-endian memory
organization.
Both of the PWM peripherals are programmed via the APB, receive scaled clock inputs from
the clock controller and produce outputs at external pins.
The processor has two independent DC-level PWM outputs, PWMOUT and PWMO1. The
PWM outputs are sourced by programable duty-cycle pulse generators. From a
programmer's point of view, for each channel there are two 16-bit registers. These can be
used to specify the width of the pulse cycle (in terms of number of PWM clock cycles), and
the duration of high-phase of the pulse (set in terms of the number of PWM clock cycles).