Cirrus Logic EP93xx - Manual (Page 599)

DS785UM1 17-3
Copyright 2007 Cirrus Logic
IrDA
EP93xx User’s Guide
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17.3.2.1 General Configuration
17.3.2.1.1 Select Ir Mode
The IrEnable register selects which of the three Ir sub-modules is used to operate the IrDA
interface. Only one of the three may be active at any one time. The reset value for this
register is zero, which disables all three encoder/decoder modules. The bottom two bits of
this register select the encoder/decoder module according to the tabulated values:
SIR does not use the data transfer mechanism described in this section. After selecting SIR
mode, all data transfer operations are made through a UART, as if connection is through a
serial cable without handshake lines. The features described below are implemented for the
MIR and FIR modes.
17.3.2.1.2 Select Data Rate
The data rates for MIR and FIR are as follows:
• MIR - Clear BRD bit in IrControl (IrCon) for 0.576 Mbit/sec,
Set BRD bit in IrCon for 1.152 Mbit/sec.
• FIR - Fixed at 4 Mbit/sec.
17.3.2.2 Transmitting Data
17.3.2.2.1 Initialization
The principal method of data transfer from memory to the active IrDA encoder (MIR or FIR) is
by DMA. Typically DMA can be used to transfer data of any length into the transmit FIFO
when requested by the infrared peripheral. When polling or interrupts are used to perform the
data transfer, a mechanism exists for transmitting data packets that are not a multiple of 4
bytes in length. This uses a register called IrDataTail and its use is described in the next
section.
The DMA route is usually provided to overcome any large interrupt response times that may
exist in the SoC where the Infrared module is going to be used. These large interrupt
response times can make programmed I/O an impractical method for transferring large Ir
data packets.
Table 17-1. Bit Values to Select Ir Module
IrEnable
EN1
IrEnable
EN0
Encoder
Selected
0 0 None
0 1 SIR
1 0 MIR
1 1 FIR