Cirrus Logic EP93xx - Manual (Page 97)

DS785UM1 3-27
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
EP93xx User’s Guide
3
3
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Move Upper Half 64-bit Integer from MaverickCrunch to ARM
Description:
Moves the upper half of a 64-bit integer stored in a MaverickCrunch register
into an ARM register.
Mnemonic:
CFMVR64H<cond> Rd, CRn
Bit Definitions:
Rd: Destination ARM register
CRn: Source register
3.5.3 Accumulator and DSPSC Move Instructions
Move MaverickCrunch Register to Lower Accumulator
Description:
Moves the low 32 bits of a MaverickCrunch register to the lowest 32 bits of an
accumulator (31:0).
Mnemonic:
CFMVAL32<cond> CRd, CRn
Bit Definitions:
CRd: Destination accumulator
CRn: Source register
Move Lower Accumulator to MaverickCrunch Register
Description:
Moves the lowest 32 bits of an accumulator (31:0) to the low 32 bits of a
MaverickCrunch register.
Mnemonic:
CFMV32AL<cond> CRd, CRn
Bit Definitions:
CRd: Destination register
CRn: Source accumulator
31:28 27:24 23:22 21 20 19:16 15:12 11:8 7:5 4 3:0
cond 1 1 1 0 0 0 0 1 CRn Rd 0 1 0 1 0 0 1 1 CRm
31:28 27:24 23:22 21:20 19:16 15:12 11:8 7:5 4 3:0
cond 1 1 1 0 0 0 1 0 CRn CRd 0 1 0 0 0 1 0 0 CRm
31:28 27:24 23:22 21:20 19:16 15:12 11:8 7:5 4 3:0
cond 1 1 1 0 0 0 0 1 CRn CRd 0 1 0 0 0 1 0 0 CRm