Rockwell Automation 1397 DC Drive Firmware 2.xx - Manual (Page 201)

5–91 Programming Parameters
Publication 1397-5.0 — June, 2001
Process PI
[OCL Fdbk Source] — P.290
Selects whether the outer control loop (OCL)
feedback signal is obtained from an I/O
Expansion kit analog input or from an
eight-sample average of the current minor
loop (CML) feedback signal.
Selecting [Cur Lp Fdbk] allows an outer
current loop to be implemented.
Display/Drive Units: Numeric/Text
Parameter Range: 0 = None
1 = Cur Lp Fdbk
2 = Analog In 3
3 = Analog In 4
4 = Frequency In
5 = Adapter 1
6 = Adapter 2
7 = Adapter 3
8 = Adapter 4
9 = Adapter 5
10 = Adapter 6
Default Setting:
Parameter Type: Configurable
Group: Process PI
Minimum Value: 0
Factory Default: 1 (Cur Lp Fdbk)
Maximum Value 10
[OCL LeadLag Freq] — P.291
Lead/lag low break frequency of the outer
control loop. Sets the lead break frequency if
[OCL LeadLag Type ] is set to Lead/Lag.
Sets the lag break frequency if [OCL
LeadLag Type] is set to Lag/Lead. Display/Drive Units: RD/S
Parameter Type: Tunable
Group Process PI
Minimum Value: 0.01 rad/sec
Factory Default: 1.00 rad/sec.
Maximum Value 6.98 rad/sec
The OCL lead/lag high break frequency is determined by the settings of this parameter and the [OCL Leadlag Rato]. For example, if the low
break frequency is 0.50 rad/sec and the ratio is 10, the high break frequency is 5.00 rad/sec.