Freescale Semiconductor MCF5480 - Manual (Page 114)

MCF548x Reference Manual, Rev. 3
3-10 Freescale Semiconductor
3.3.3 EMAC Programming Model
The registers in the EMAC portion of the user programming model are described in Chapter 4, “Enhanced
Multiply-Accumulate Unit (EMAC),” and include the following registers:
• Four 48-bit accumulator registers partitioned as follows:
— Four 32-bit accumulators (ACC0–ACC3)
— Eight 8-bit accumulator extension bytes (two per accumulator). These are grouped into two
32-bit values for load and store operations (ACCEXT01 and ACCEXT23).
Accumulators and extension bytes can be loaded, copied, and stored, and results from EMAC
arithmetic operations generally affect the entire 48-bit destination.
• Eight 8-bit accumulator extensions (two per accumulator), packaged as two 32-bit values for load
and store operations (ACCext01 and ACCext23)
• One 16-bit mask register (MASK)
• One 32-bit status register (MACSR), including four indicator bits signaling product or
accumulation overflow (one for each accumulator: PAV0–PAV3).
These registers are shown in Figure 3-5 .
Figure 3-5. EMAC Register Set
3.3.4 FPU Programming Model
The registers in the FPU portion of the programming model are described in Chapter 6, “Floating-Point
Unit (FPU),” and include the folllowing registers:
Table 3-1. CCR Field Descriptions
Bits Name Description
7–5 — Reserved, should be cleared.
4 X Extend condition code bit. Assigned the value of the carry bit for arithmetic operations;
otherwise not affected or set to a specified result. Also used as an input operand for
multiple-precision arithmetic.
3 N Negative condition code bit. Set if the msb of the result is set; otherwise cleared.
2 Z Zero condition code bit. Set if the result equals zero; otherwise cleared.
1 V Overflow condition code bit. Set if an arithmetic overflow occurs, implying that the result
cannot be represented in the operand size; otherwise cleared.
0 C Carry condition code bit. Set if a carry-out of the data operand msb occurs for an addition
or if a borrow occurs in a subtraction; otherwise cleared.
31 0
MACSR MAC status register
ACC0 MAC accumulator 0
ACC1 MAC accumulator 1
ACC2 MAC accumulator 2
ACC3 MAC accumulator 3
ACCext01 Extensions for ACC0 and ACC1
ACCext23 Extensions for ACC2 and ACC3
MASK MAC mask register