Freescale Semiconductor MCF5480 - Manual (Page 121)

Data Format Summary
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 3-17
3.4.2 EMAC Data Representation
The EMAC supports the following three modes, where each mode defines a unique operand type.
• Two’s complement signed integer: In this format, an N-bit operand value lies in the range -2
(N-1)
< operand < 2
(N-1)
- 1. The binary point is right of the lsb.
• Unsigned integer: In this format, an N-bit operand value lies in the range 0 < operand < 2
N
- 1. The
binary point is right of the lsb.
• Two’s complement, signed fractional: In an N-bit number, the first bit is the sign bit. The remaining
bits signify the first N-1 bits after the binary point. Given an N-bit number, a
N-1
a
N-2
a
N-3
... a
2
a
1
a
0
,
its value is given by the equation in Figure 3-12 .
Figure 3-12. Two’s Complement, Signed Fractional Equation
This format can represent numbers in the range -1 < operand < 1 - 2
(N-1)
.
For words and longwords, the largest negative number that can be represented is -1, whose internal
representation is 0x8000 and 0x8000_0000, respectively. The largest positive word is 0x7FFF or (1 – 2
-15
);
the most positive longword is 0x7FFF_FFFF or (1 – 2
-31
).
For more information, see Chapter 4, “Enhanced Multiply-Accumulate Unit (EMAC).”
3.4.2.1 Floating-Point Data Formats and Types
The FPU supports signed byte, word, and longword integer formats, which are identical to those
supported by the integer unit. The FPU also supports single- and double-precision binary
floating-point formats that fully comply with the IEEE-754 standard.
For more information, see Chapter 6, “Floating-Point Unit (FPU).”
31 24 23 16 15 8 7 0
Longword 0x0000_0000
Word 0x0000_0000 Word 0x0000_0002
Byte 0x0000_0000 Byte 0x0000_0001 Byte 0x0000_0002 Byte 0x0000_0003
Longword 0x0000_0004
Word 0x0000_0004 Word 0x0000_0006
Byte 0x0000_0004 Byte 0x0000_0005 Byte 0x0000_0006 Byte 0x0000_0007
. . .
. . .
. . .
Longword 0xFFFF_FFFC
Word 0xFFFF_FFFC Word 0xFFFF_FFFE
Byte 0xFFFF_FFFC Byte 0xFFFF_FFFD Byte 0xFFFF_FFFE Byte 0xFFFF_FFFF
Figure 3-11. Memory Operand Addressing
value 1 a
N 1 –
⋅ ( ) – 2
i 1 N – + ( )
ai ⋅
i 0 =
N 2 –
∑
+ =