4 miscellaneous instruction execution timing, Miscellaneous instruction execution timing -32 – Freescale Semiconductor MCF5480 User Manual

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MCF548x Reference Manual, Rev. 3

3-32

Freescale Semiconductor

3.7.4

Miscellaneous Instruction Execution Timing

Table 3-16

lists timings for miscellaneous instructions.

lsr.l

<ea>,Dx

1(0/0)

—

—

—

—

—

—

1(0/0)

mac.w

Ry,Rx

1(0/0)

—

—

—

—

—

—

—

mac.l

Ry,Rx

3(0/0)

—

—

—

—

—

—

—

msac.w

Ry,Rx

1(0/0)

—

—

—

—

—

—

—

msac.l

Ry,Rx

3(0/0)

—

—

—

—

—

—

—

mac.w

Ry,Rx,ea,Rw

—

1(1/0)

1(1/0)

1(1/0)

1(1/0)

—

—

—

mac.l

Ry,Rx,ea,Rw

—

3(1/0)

3(1/0)

3(1/0)

3(1/0)

—

—

—

msac.w

Ry,Rx,ea,Rw

—

1(1/0)

1(1/0)

1(1/0)

1(1/0)

—

—

—

msac.l

Ry,Rx,ea,Rw

—

3(1/0)

3(1/0)

3(1/0)

3(1/0)

—

—

—

muls.w

<ea>,Dx

3(0/0)

3(1/0)

3(1/0)

3(1/0)

3(1/0)

4(1/0)

3(1/0)

3(0/0)

mulu.w

<ea>,Dx

3(0/0)

3(1/0)

3(1/0)

3(1/0)

3(1/0)

4(1/0)

3(1/0)

3(0/0)

muls.l

<ea>,Dx

5(0/0)

5(1/0)

5(1/0)

5(1/0)

5(1/0)

—

—

—

mulu.l

<ea>,Dx

5(0/0)

5(1/0)

5(1/0)

5(1/0)

5(1/0)

—

—

—

or.l

<ea>,Rx

1(0/0)

1(1/0)

1(1/0)

1(1/0)

1(1/0)

2(1/0)

1(1/0)

1(0/0)

or.l

Dy,<ea>

—

1(1/1)

1(1/1)

1(1/1)

1(1/1)

2(1/1)

1(1/1)

—

or.l

#imm,Dx

1(0/0)

—

—

—

—

—

—

—

rems.l

<ea>,Dx

35(0/0)

35(1/0)

35(1/0)

35(1/0)

35(1/0)

—

—

—

remu.l

<ea>,Dx

35(0/0)

35(1/0)

35(1/0)

35(1/0)

35(1/0)

—

—

—

sub.l

<ea>,Rx

1(0/0)

1(1/0)

1(1/0)

1(1/0)

1(1/0)

2(1/0)

1(1/0)

1(0/0)

sub.l

Dy,<ea>

—

1(1/1)

1(1/1)

1(1/1)

1(1/1)

2(1/1)

1(1/1)

—

subi.l

#imm,Dx

1(0/0)

—

—

—

—

—

—

—

subq.l

#imm,<ea>

1(0/0)

1(1/1)

1(1/1)

1(1/1)

1(1/1)

2(1/1)

1(1/1)

—

subx.l

Dy,Dx

1(0/0)

—

—

—

—

—

—

—

Table 3-16. Miscellaneous Instruction Execution Times

Opcode

<ea>

Effective Address

Rn

(An)

(An)+

–(An)

(d16,An)

(d8,An,Xi*SF)

(xxx).wl

#<xxx>

cpushl

(Ax)

—

9(0/1)

—

—

—

—

—

—

intouch

(Ay)

—

19(1/0)

link.w

Ay,#imm

2(0/1)

—

—

—

—

—

—

—

move.w

CCR,Dx

1(0/0)

—

—

—

—

—

—

—

move.w

<ea>,CCR

1(0/0)

—

—

—

—

—

—

1(0/0)

Table 3-15. Two-Operand Instruction Execution Times (Continued)

Opcode

<ea>

Effective Address

Rn

(An)

(An)+

–(An)

(d16,An)

(d8,An,Xi*SF)

(xxx).wl

#<xxx>

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