Freescale Semiconductor MCF5480 - Manual (Page 150)

MCF548x Reference Manual, Rev. 3
4-2 Freescale Semiconductor
4.1.1 MAC Overview
The MAC is an extension of the basic multiplier found in most microprocessors. It is typically
implemented in hardware within an architecture and supports rapid execution of signal processing
algorithms in fewer cycles than comparable non-MAC architectures. For example, small digital filters can
tolerate some variance in an algorithm’s execution time, but larger, more complicated algorithms such as
orthogonal transforms may have more demanding speed requirements beyond the scope of any processor
architecture, and may require full DSP implementation.
To strike a balance between speed, size, and functionality, the ColdFire MAC is optimized for a small set
of operations that involve multiplication and cumulative additions. Specifically, the multiplier array is
optimized for single-cycle pipelined operations with a possible accumulation after product generation.
This functionality is common in many signal processing applications. The ColdFire core architecture also
has been modified to allow an operand to be fetched in parallel with a multiply, increasing overall
performance for certain DSP operations.
Consider a typical filtering operation where the filter is defined,11 as in
Figure 4-2 .
Figure 4-2. Infinite Impulse Response (IIR) Filter
Here, the output y(i) is determined by past output values and past input values. This is the general form of
an infinite impulse response (IIR) filter. A finite impulse response (FIR) filter can be obtained by setting
coefficients a(k) to zero. In either case, the operations involved in computing such a filter are multiplies
and product summing. To show this point, reduce the above equation to a simple, four-tap FIR filter, shown
in Figure 4-3 , in which the accumulated sum is a sum of past data values and coefficients.
Figure 4-3. Four-Tap FIR Filter
4.1.2 General Operation
The MAC speeds execution of ColdFire integer multiply instructions (MULS and MULU) and provides
additional functionality for multiply-accumulate operations. By executing MULS and MULU in the MAC,
y i ( ) a
k 1 =
N 1 –
∑
= k ( )y i k – ( ) b
k 0 =
N 1 –
∑
k ( )x i k – ( ) +
y i ( ) b k ( )x i k – ( )
k 0 =
3
∑
b 0 ( )x i ( ) b 1 ( )x i 1 – ( ) b 2 ( )x i 2 – ( ) b 3 ( )x i 3 – ( ) + + + = =