Freescale Semiconductor MCF5480 - Manual (Page 283)

Background Debug Mode (BDM)
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 8-33
8.5.3.1 ColdFire BDM Command Format
All ColdFire Family BDM commands include a 16-bit operation word followed by an optional set of one
or more extension words, as shown in Figure 8-21 .
Table 8-25 describes BDM fields.
8.5.3.1.1 Extension Words as Required
Some commands require extension words for addresses or immediate data. Addresses require two
extension words because only absolute long addressing is permitted. Longword accesses are forcibly
longword-aligned and word accesses are forcibly word-aligned. Immediate data can be 1 or 2 words long.
Byte and word data each requires one extension word and longword data requires two extension words.
Operands and addresses are transferred most-significant word first. In the following descriptions of the
BDM command set, the optional set of extension words is defined as address, data, or operand data.
8.5.3.2 Command Sequence Diagrams
The command sequence diagram in Figure 8-22 shows serial bus traffic for commands. Each bubble
represents a 17-bit bus transfer. The top half of each bubble indicates the data the development system
15 10 9 8 7 6 5 4 3 2 0
Operation 0 R/W Op Size 0 0 A/D Register
Extension Word(s)
Figure 8-21. BDM Command Format
Table 8-25. BDM Field Descriptions
Bit Name Description
15–10 Operation Specifies the command. These values are listed in Table 8-24 .
9 — Reserved
8 R/W Direction of operand transfer.
0 Data is written to the CPU or to memory from the development system.
1 The transfer is from the CPU to the development system.
7–6 Operand
Size
Operand data size for sized operations. Addresses are expressed as 32-bit absolute
values. Note that a command performing a byte-sized memory read leaves the upper 8 bits
of the response data undefined. Referenced data is returned in the lower 8 bits of the
response.
Operand SizeBit Values
00 Byte8 bits
01 Word16 bits
10 Longword32 bits
11 Reserved—
5–4 — Reserved
3 A/D Address/data. Determines whether the register field specifies a data or address register.
0 Indicates a data register.
1 Indicates an address register.
2–0 Register Contains the register number in commands that operate on processor registers.