Freescale Semiconductor MCF5480 - Manual (Page 477)

SDRAM Example
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 18-29
18.8.6 Set the Extended Mode Register
The SDMR should be programmed as shown in Figure 18-19 . This step enables the DDR memory’s DLL.
This configuration results in a value of SDMR = 0x4001_0000, as described in Table 18-20 .
18.8.7 Set the Mode Register and Reset DLL
The SDMR should be programmed as shown in Figure 18-20 . This step programs the mode register and
resets the DLL.
This configuration results in a value of SDMR = 0x048D_0000, as described in Table 18-21 .
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Field BNKAD OPTION DLL — CMD
Setting 0100_0000_0000_0001
(hex) 4 0 0 1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field —
Setting 0000_0000_0000_0000
(hex) 0 0 0 0
Figure 18-19. SDRAM Mode/Extended Mode Register Settings (SDMR)
Table 18-20. SDMR Field Descriptions
Bits Name Setting Description
31–30 BNKAD 01 01 selects the extended mode register.
29–18 OPTION 0 Optional operating modes for the DDR. 0 selects normal operation.
18 DLL 0 Enable the DLL.
17 — 0 Reserved. Should be cleared.
16 CMD 1 Initiate the LEMR command.
15–0 — 0 Reserved. Should be cleared.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Field BNKAD OP_MODE CASL BT BLEN — CMD
Setting 0000_0100_1000_ 1101
(hex) 0 4 8 D
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field —
Setting 0000_0000_0000_0000
(hex) 0 0 0 0
Figure 18-20. SDRAM Mode/Extended Mode Register Settings (SDMR)