Freescale Semiconductor MCF5480 - Manual (Page 92)

MCF548x Reference Manual, Rev. 3
2-22 Freescale Semiconductor
2.2.5 Clock and Reset Signals
The clock and reset signals configure the MCF548x and provide interface signals to the external system.
2.2.5.1 Reset In (RSTI)
Asserting RSTI causes the MCF548x to enter reset exception processing. RSTO is asserted automatically
when RSTI is asserted.
2.2.5.2 Reset Out (RSTO)
After RSTI is asserted, the PLL temporarily loses its lock, during which time RSTO is asserted. When the
PLL regains its lock, RSTO negates again. This signal can be used to reset external devices.
2.2.5.3 Clock In (CLKIN)
CLKIN is the MCF548x input clock frequency to the on-board, phase-locked loop (PLL) clock generator.
CLKIN is used to internally clock or sequence the MCF548x internal bus interface at a selected multiple
of the input frequency used for internal module logic.
CLKIN is used as the clock reference for PCI and FlexBus transfers.
2.2.6 Reset Configuration Pins
This section describes address/data pins, AD[12:0], that are read at reset to configure the MCF548x.
2.2.6.1 AD[12:8]—CLKIN to SDCLK Ratio (CLKCONFIG[4:0])
The clock configuration inputs, CLKCONFIG[4:0], indicate the CLKIN to SDCLK ratio. CLKIN is used
as the external reference for both PCI and FlexBus cycles. The CLKIN to SDCLK ratio is selectable, where
SDCLK is the clock frequency used for SDRAM accesses and the internal XLB bus. The core is always
clocked at twice the SDCLK frequency.
These signals are sampled on the rising edge of RSTI.
Table 2-4 shows how the logic levels of AD[12:8]
correspond to the selected clock ratio.
Figure 2-2 correlates CLKIN, internal bus, and core clock frequenciesi for the 1x–4x multipliers.
Table 2-4. MCF548x Divide Ratio Encodings
FB_AD[12:8]
1
1
All other values of FB_AD[12:8] are reserved.
Clock Ratio
CLKIN—PCI and FlexBus
Frequency Range
(MHz)
Internal XLB, SDRAM
Bus, and PSTCLK
Frequency Range
(MHz)
Core Frequency Range
(MHz)
00011 1:2 41.6–50.0 83.33–100 166.66–200
00101 1:2 30.0–44.4 60.0–88.8 120.0–177.66