10 hardware loops, 1 enabled loop, 2 enveloping loop – Freescale Semiconductor StarCore SC140 User Manual

Page 257: 5 static programming rules, 1 hardware loop detection, Hardware loops -7, Enabled loop -7, Enveloping loop -7, Static programming rules -7, Hardware loop detection -7

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Static Programming Rules

SC140 DSP Core Reference Manual

7-7

7.4.10 Hardware Loops

The loop count “LCn” and start address “SAn” registers are described in

Section 5.4.1, “Loop

Programming Model,”

on page 5-25.

The VLES addresses “LA, LA-1, LA-2” (relative to the loop end (last) address) and “SA, SA-1, SA-2”
(relative to the loop start address) are defined in

Section 5.4.2, “Loop Notation and Encoding,”

on page

5-26. The minus “-” notation adjusts the VLES address earlier in the source code order.

The term “active loop” is defined in

Section 5.4.4, “Loop Nesting,”

on page 5-28.

All references to “in a loop” in this manual refer to both long and short loops, unless explicitly stated.

7.4.10.1 Enabled Loop

In a nested loop structure, more than one loop can be enabled at the same time. A loop n is enabled when
its LFn bit in SR is set, where n is the loop index. The assembler’s static rule detection assumes loop n is
enabled from the VLES after the VLES having the DOENn/DOENSHn instruction to LA of loop n (as
specified by the LOOPENDn directive).

7.4.10.2 Enveloping Loop

In a nested loop structure, a loop “B” is nested inside another loop “A”. For this pair of loops, loop “B” is
called a “nested loop” and loop “A” is called an “enveloping loop”. That is, loop “A” envelopes (surrounds
or contains) loop “B”. This definition is relative to each loop pair. If another loop “C” is nested inside loop
“B”, loop “C” becomes the nested loop and loop “B” becomes the enveloping loop for this loop pair.

Loops “A” and “B” are required to have ordered (but not adjacent) loop indexes. The assembler’s static
rule detection assumes the boundaries of loop n are from the VLES after the VLES having the
DOENn/DOENSHn instruction to LA of loop n (as specified by the LOOPENDn directive).

7.5 Static Programming Rules

Static programming rules are detected by examining the mnemonic/symbolic source code within the
visibility of the assembler. Generally the assembler has visibility over a single source file with its
INCLUDE files and MACRO expansions. The assembler detects all static rules in sequential VLES within
its visibility.

7.5.1 Hardware Loop Detection

The assembler detects static rules for hardware loop iterations (LA to SA sequences) when all loop source
code including the DOENn/DOENSHn instruction, LOOPSTARTn and LOOPENDn assembler directives
for all nesting levels are within its visibility. The assembler rule detection makes the following
assumptions:

The loop flags (LFn and SLF) in SR are not changed within an active loop.

Each loop n has one SA and one LA specified by the LOOPSTARTn and LOOPENDn directives,
respectively.

Loops enter at SA and exit from LA, except for exits using loop control instructions: BREAK and
CONT/CONTD.

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