Freescale Semiconductor StarCore SC140 - Manual (Page 219)

Working Modes
SC140 DSP Core Reference Manual 5-39
5.6.3.2 Single-stack RTOS
Figure 5-9 illustrates state transitions for a single-stack-based operating system.
Figure 5-9. Working mode Transitions - Unprotected Single-stack RTOS
Existing single-stack operating systems operate exclusively in the Exception working mode. The EXP bit
is always set, making ESP the active SP for all operating system and user tasks. Transfer of control
between the operating system and user tasks is typically made via change-of-flow (COF) instructions (JSR,
RTS/D and RTSTK/D). If an exception is taken, the exception service routine returns control via RTE/D.
5.6.4 Working Mode Transitions
5.6.4.1 From Exception to Normal mode
The core leaves the Exception mode and enters the Normal mode by either explicitly changing the EXP bit
in the SR (for example with the instruction:
BMCLR #4,SR.H ), or executing a Return From Exception
(RTE/D) instruction. If this transition is to be taken to a new task that is not on the stack, the stack must be
pre-loaded with suitable values before performing the RTE. The following explicit actions must be taken:
• The address of the first VLES for the task must be stored in the memory location representing the
PC on the active (ESP) stack.
• The memory location representing SR on the active (ESP) stack must be set with EXP=0.
• An RTE/D instruction restores the PC and SR from the active (ESP) stack.
From the core’s point of view, the difference between Exception and Normal modes is only the identity of
the active stack pointer (NSP vs. ESP).
5.6.4.2 From Normal to Exception mode
The core leaves the Normal mode and enters the Exception mode upon taking an exception, either via a
TRAP instructions, or via an imprecise exception or interrupt request. It can also enter the Exception mode
by explicitly setting the EXP in the SR (directly using an instruction or indirectly using RTE where in the
restored SR EXP=1). Upon an exception, the following implicit actions occur:
Reset
exception
or external interrupt
request
return from exception via
RTE/D
EXP SP
1 ESP
Exception Mode