6 status bit rules, Status bit rules -22, Sr read in a contd delay slot -22 – Freescale Semiconductor StarCore SC140 User Manual
Page 272: Emr use in return delay slots -22, T bit update to ift/iff agu use -22
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SC140 DSP Core Reference Manual
Static Programming Rules
Rule D.8
A MOVE-like instruction that reads the SR register is not allowed in the delay slot of a CONTD
instruction.
Example 7-37. SR Read in a CONTD Delay Slot
contd _label
move.l sr,d0
;not allowed
Rule D.9
Instructions that read the EMR register are not allowed in the delay slot of a RTED, or RTSTKD
instruction.
Example 7-38. EMR Use in Return Delay Slots
rtstkd
move.l emr,d0
;not allowed
rted
bmclr #$fffb,emr.l
;not allowed
7.5.6 Status Bit Rules
Rule T.1
At least one VLES is required between an instruction that affects the T status bit in SR and an AGU
instruction in an IFT/IFF group or subgroup. This rule does not apply to AGU instructions in an IFA
subgroup.
Example 7-39. T Bit Update to IFT/IFF AGU Use
tsteq d0
ift move.l r0,d1
; not allowed
tsteq d0
nop
ift move.l r0,d1
; allowed
tsteq d0
ift mac d0,d1,d2
; allowed
tsteq d0
ift mac d0,d1,d2
ifa move.l r0,d1
; allowed