Freescale Semiconductor StarCore SC140 - Manual (Page 357)

AND
SC140 DSP Core Reference Manual A-43
AND
Bitwise AND with 16-Bit Immediate (BMU)
AND
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example
and #$a70e,d1.h
Operation Assembler Syntax
#u16
• DR.L → DR.L
AND #u16,DR.L
#u16
• DR.H → DR.H
AND #u16,DR.H
AND #u16,DR.L
Performs a bitwise AND on an immediate unsigned word and the contents of the LP of a source data or
address register (DR). Stores the result in the LP of the data or address register (DR). The HP of the register
is unaffected.
Note: This instruction is assembler-mapped to BMCLR #~u16,DR.L where #~u16 is the bitwise
complement of #u16.
AND #u16,DR.H
Performs a bitwise AND on an immediate unsigned word and the contents of the HP of a data or address
register (DR). Stores the result in the HP of the data or address register (DR). The LP of the register is
unaffected.
Note: This instruction is assembler-mapped to BMCLR #~u16,DR.H.
Register Address Bit Name Description
Ln L Clears the Ln bit in the destination register.
Register/Memory Address Before After
immediate $A70E
D1.H $57AF $070E
In binary, $A70E 1010 0111 0000 1110
$57AF 0101 0111 1010 1111
and = $070E 0000 0111 0000 1110