Move.2l, Move two integer longs, To/from a register pair (agu) description – Freescale Semiconductor StarCore SC140 User Manual
Page 570: Operation assembler syntax
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SC140 DSP Core Reference Manual
MOVE.2L
MOVE.2L
Move Two Integer Longs
MOVE.2L
to/from a Register Pair (AGU)
Description
These operations move two long words from registers to memory, or from memory to registers.
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
Example
move.2l d0:d1,(r0)
Operation
Assembler Syntax
Da,Db
↔ (EA)
MOVE.2L Da:Db,(EA){0
≤ EA < 2
32
,Q}
MOVE.2L (EA),Da:Db {0
≤ EA < 2
32
,Q}
MOVE.2L Da:Db,(EA)
MOVE.2L (EA),Da:Db
Move two long signed integer words from a data register pair (Da:Db) to memory, or from memory to a
data register pair. The effective memory address of the two long words is obtained from an address register
with an optional offset or post-increment (EA).
The first operand (Da) will be moved to or from the lower memory address (EA). The second operand (Db)
will be moved to or from memory address (EA + 4). In order to keep this behavior in both big endian and
little endian modes, the core will drive or interpret the data bus differently in each mode. See
on page 2-56, for more detail on bus and memory behavior for each mode.
The address register values used with this instruction must be a multiple of 8, quad word-aligned.
Register Address
Bit Name
Description
MCTL[31:0]
AM3–AM0
Address modification bits when updating R0–R7. Otherwise, the
instruction is not affected by MCTL.
EMR[16]
BEM
Set if big endian mode, cleared if little endian mode.
Register Address
Bit Name
Description
Ln
L
Clears the Ln bit in the destination registers.
Register/Memory Address
Before
After
MCTL
$0000 0000
SIGN
EXTENSION
39
0
32
SIGN
EXTENSION
Da
Db
(EA)
(EA + 4)