Instruction formats and opcodes, Instruction fields – Freescale Semiconductor StarCore SC140 User Manual
Page 575
MOVE.4F
SC140 DSP Core Reference Manual
A-261
move.4f (r0),d0:d1:d2:d3
Instruction Formats and Opcodes
Notes:
1.
** indicates serial grouping encoding.
2.
When the form (Rn + N0) is used in EA, the cycle count is increased by 1.
Instruction Fields
Da:Db:Dc:Dd
k
Data Register Quad
EA
MMM
Effective Address Notation
Rn
RRR
Address Register
Register/Memory Address
Before
After
MCTL
$0000 0000
R0
$0000 0100
$0100
$943C
$0102
$5AB1
$0104
$33E4
$0106
$A7AC
L0:D0
$0:$FF 943C 0000
L1:D1
$0:$00 5AB1 0000
L2:D2
$0:$00 33E4 0000
L3:D3
$0:$FF A7AC 0000
Instruction
Words Cycles Type
Opcode
15
8
7
0
MOVE.4F(EA),Da:Db:Dc:Dd
1
1
2
1
0
*
0
0
1
k
0
1
1
1 M M M R R R
0
D0:D1:D2:D3
1
D4:D5:D6:D7
Note:
This instruction can specify D8-D15 as operands by using a prefix. In
such a case, all the registers in the group will be high registers.
000
(Rn+N0)
010
(Rn)
100
(Rn)+N0
110
(Rn)+N2
001
(Rn)–
011
(Rn)+
101
(Rn)+N1
111
(Rn)+N3
000
R0
010
R2
100
R4
110
R6
001
R1
011
R3
101
R5
111
R7
Note:
This instruction can specify R8-R15 as operands by using a high register prefix.