Tsteqa.x, Test for equal to zero (agu), Description – Freescale Semiconductor StarCore SC140 User Manual
Page 729: Example 2, Operation assembler syntax
TSTEQA.x
SC140 DSP Core Reference Manual
A-415
TSTEQA.x
Test for Equal to Zero (AGU)
TSTEQA.x
Description
Set the T bit if the source AGU register (Rx) is equal to zero; otherwise, clears the T bit.
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
Example 1
tsteqa.w r4
Example 2
tsteqa.l r1
Operation
Assembler Syntax
If Rx[15:0] == 0, then 1
→ T, else 0 → T
TSTEQA.W Rx
If Rx[31:0] == 0, then 1
→ T, else 0 → T
TSTEQA.L Rx
TSTEQA.W Rx
Tests only the lower word (bits [15:0]) of the source operand.
TSTEQA.L Rx
Tests all 32 bits of the source operand.
Register Address
Bit Name
Description
SR[18]
EXP
Determines which stack pointer is used when the stack pointer is an
operand. Otherwise, the instruction is not affected by SR.
Register Address
Bit Name
Description
SR[1]
T
Set if the source operand is equal to zero and cleared if the source
operand is not equal to zero.
Register/Memory Address
Before
After
R4
$5F3E 0000
SR
$00E4 0000
$00E4 0002
Register/Memory Address
Before
After
R1
$0000 0000
SR
$00E4 0000
$00E4 0002