Bmchg.w, Bit-masked change a, Operation assembler syntax – Freescale Semiconductor StarCore SC140 User Manual

Page 386

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SC140 DSP Core Reference Manual

BMCHG.W

BMCHG.W

Bit-Masked Change a

BMCHG.W

16-Bit Operand in Memory (BMU)

Description

These operations use an unsigned 16-bit immediate data mask to invert selected bits in the destination
operand. For each bit i that is set (selected) in the mask, the bit i in the corresponding destination
operation’s bit position is inverted. These operations read from memory, modify the retrieved value, and
write the new value back to that memory address, resulting in two memory accesses. The absolute
addresses, offsets, and address register values must be word-aligned.

Status and Conditions that Affect Instruction

Status and Conditions Changed by Instruction

None.

Operation

Assembler Syntax

~(SP-u5)

i

→ (SP-u5)

i

(i denotes bits=1 in #u16)

BMCHG.W #u16,(SP–u5){0

≤ u16 < 2

16

}{0

≤ u5 < 64,W}

~(SP+s16)

i

→ (SP+s16)

i

BMCHG.W #u16,(SP+s16){0

≤ u16 < 2

16

}{–2

15

≤ s16 < 2

15

,W}

~(Rn)

i

→ (Rn)

i

BMCHG.W #u16,(Rn) {0

≤ u16 < 2

16

}

~(a16)

i

→ (a16)

i

BMCHG.W #u16,(a16) {0

≤ u16 < 2

16

}{0

≤ a16 < 2

16

,W}

BMCHG.W #u16,(SP–u5)

Inverts selected bits in the contents of a memory address pointed to by the active stack pointer (SP) with an
unsigned 5-bit offset.

BMCHG.W #u16,(SP+s16)

Inverts selected bits in the contents of a memory address pointed to by the active stack pointer (SP) with a
signed 16-bit offset.

BMCHG.W #u16,(Rn)

Inverts selected bits in the contents of a memory address pointed to by an address register (Rn).

BMCHG.W #u16,(a16)

Inverts selected bits in the contents of a memory address pointed to by an absolute 16-bit address.

Register Address

Bit Name

Description

SR[18]

EXP

Determines which stack pointer is used when the stack pointer is an
operand. Otherwise, the instruction is not affected by SR.

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