Signed fractional multiply (dalu), Operation assembler syntax – Freescale Semiconductor StarCore SC140 User Manual
Page 633
MPY
SC140 DSP Core Reference Manual
A-319
MPY
Signed Fractional Multiply (DALU)
MPY
Description
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
Example 1
mpy d4,d5,d6
Operation
Assembler Syntax
Da.H * Db.H
→ Dn
MPY Da,Db,Dn
MPY Da,Db,Dn
Performs signed fractional multiplication of the high portions of two data registers (Da, Db) and stores the
product in a destination data register (Dn).
Register Address
Bit Name
Description
SR[2]
SM
If set, selects 32-bit arithmetic saturation mode.
SR[5:4]
S[1:0]
Scaling bits determine which bits in the result are used in the Ln bit
calculation.
Register Address
Bit Name
Description
Ln
L
If not in arithmetic saturation mode (SR [SM] = 0), calculates and
updates the Ln bit in the destination register. If in arithmetic saturation
mode (SR [SM] = 1), clears the Ln bit in the destination register.
EMR[2]
DOVF
Set if the result cannot be represented in 40 bits, or if the result
saturates to 32 bits in saturation mode.
Register/Memory Address
Before
After
SR
$00E0 0000
D4
$FF C000 0000
D5
$00 2000 0000
L6:D6
$0:$FF F000 0000
EMR
$0000 0000