Freescale Semiconductor StarCore SC140 - Manual (Page 302)

7-52 SC140 DSP Core Reference Manual
LPMARK Rules
7.8.2 Static Programming Rules
This section defines new SC140 LPMARK programming rules for correct LPMARKA and LPMARKB
instruction use in a VLES, when enabled by an assembler switch. When enabled, these rules apply in
addition to the other programming rules.
7.8.2.1 General Grouping Rules
LPMARK Rule G.G.1
The LPMARKA and LPMARKB instructions are not counted for this rule.
7.8.2.2 Prefix Grouping Rules
LPMARK Rule G.P.3
Multiple LPMARKA instructions cannot be grouped in a VLES. Multiple LPMARKB instructions cannot
be grouped in a VLES. This LPMARK rule applies to the whole VLES.
LPMARK Rule G.P.6
The LPMARKA and LPMARKB instructions are not counted for this rule.
LPMARK Rule G.P.7
IFc instructions do not affect the LPMARKA and LPMARKB instructions. The LPMARKA and
LPMARKB instructions always execute unconditionally, and can be placed anywhere in the assembly
source order.
7.8.3 Dynamic Programming Rules
The LPMARK rules in this section are alternate forms of SC140 programming rules detectable from the
prefix encoding. Source code that complies with the assembly notation rules is by definition compliant
with LPMARK rules. These LPMARK rules allow the simulator to detect dynamic programming rules that
are not detectable by the assembler.
7.8.3.1 LPMARK Notation
The LPMARK rules use the VLES address notation “LPA-2, LPA-1, and LPA” (relative to the VLES
having LPMARKA set) and “LPB, LPB+1 and LPB+2” (relative to the VLES having LPMARKB set).
The minus “-” notation adjusts the VLES address earlier in the object code order.
7.8.3.1.1 Active Loop
In a nested loop structure, more than one loop can be enabled at the same time. A loop is enabled when its
LFn bit in SR is set, where n is the loop index. The enabled loop with the highest index is defined as the
“active loop”. This definition is dynamic and follows the SC140 loop state machine. The SC140 loop
state machine and simulator determine the “active loop” from the LFn bits in SR when a VLES having an
LPMARK bit set is executed.