Freescale Semiconductor StarCore SC140 - Manual (Page 572)

A-258 SC140 DSP Core Reference Manual
MOVE.2W
MOVE.2W
Move Two Integer Words
MOVE.2W
to/from a Register Pair (AGU)
Description
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
Example
move.2w d0:d1,(r0)
Operation Assembler Syntax
(EA)
↔ Da:Db
MOVE.2W (EA),Da:Db {0
≤ EA < 2
32 ,L}
MOVE.2W Da:Db,(EA) {0
≤ EA < 2
32 ,L}
MOVE.2W (EA),Da:Db
MOVE.2W Da:Db,(EA)
Moves two signed integer words from memory to a data register pair (Da:Db), or from the registers to
memory. The effective memory address of the two words is obtained from an address register with an
optional offset or post-increment (EA). Each word is stored in the LP of its respective data register.
The first operand (Da) will be moved to or from the lower memory address (EA) and the second operand
(Db) will be moved to or from memory address (EA + 2). In order to keep this behavior in both big endian
and little endian modes, the core will drive or sample the data bus differently in each mode. See
Section 2.4.1, “SC140 Endian Support,” on page 2-56, for more detail on bus and memory behavior for
each mode.
The address register values used with this instruction must be a multiple of 4, long word-aligned.
Register Address Bit Name Description
MCTL[31:0] AM3–AM0 Address modification bits when updating R0–R7. Otherwise, the
instruction is not affected by MCTL.
EMR[16] BEM Set if big endian mode, cleared if little endian mode.
Register Address Bit Name Description
Ln L Clears the Ln bit in the destination registers.
Register/Memory Address Before After
MCTL $0000 0000
SIGN EXTENSION
39 0 16
SIGN EXTENSION
Da
Db
(EA + 2)
(EA)