Freescale Semiconductor StarCore SC140 - Manual (Page 208)

5-28 SC140 DSP Core Reference Manual
Hardware Loops
5.4.4 Loop Nesting
The core has four hardware loops (LOOP0, LOOP1, LOOP2 and LOOP3) to execute up to four levels of
loop nesting. A loop can only be nested within a loop that has a lower index. In a nested loop structure,
more than one loop can be enabled at one time. A loop is enabled when its corresponding LFn is set. The
LF3–LF0 bits indicate which of the loops are enabled. The enabled loop with the highest index is defined
as the “active loop”. Only one loop can be active at a time.
Figure 5-5 shows an example of the loop nesting structure.
Figure 5-5. Loop Nesting
In Figure 5-5, all three loops are initially disabled. Loop 3 has the highest index, Loop 2 has the next
highest index, and Loop 0 has the lowest index of the three. In the normal program flow through the loops,
Loop 0 is enabled and its first iteration takes it to Loop 2, which is enabled. Loop 2 has a higher index than
Loop 0, so Loop 2 is the active loop. In the first iteration of Loop 2, Loop 3 is enabled and now becomes
the active loop. Loop 3 is active until it has finished repeating, at which time Loop 2 becomes active. When
Loop 2 stops repeating (including further complete cycles of Loop 3), Loop 0 becomes the active loop.
When Loop 0 stops repeating, no loops are active.
5.4.5 Loop Iteration and Termination
The CONT instruction causes the active loop iteration to conditionally terminate before reaching the last
execution set of the loop. If the value of LCn is greater than one, then the CONT instruction causes the
program to jump to the address stored in SAn. The LCn is decremented by one and the loop is repeated. If
the value of LCn is less than or equal to one, then the CONT instruction causes the program to branch to
the address specified by the CONT instruction. The LCn is cleared and the loop terminates (LFx is
cleared).
The BREAK instruction also causes the active loop to terminate. The program address bus is loaded with
the address specified by the BREAK instruction. The loop terminates (LFx is cleared) regardless of the
value of LCn, which is not changed.
Loop 0
Loop 2
Loop 3