Iaddnc.w, Integer addition, Instruction formats and opcodes instruction fields – Freescale Semiconductor StarCore SC140 User Manual
Page 489: Iaddnc.w #$a002,d2
IADDNC.W
SC140 DSP Core Reference Manual
A-175
IADDNC.W
Integer Addition
IADDNC.W
Without Changing the Carry Bit
Not Affected by Saturation (DALU)
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed By Instruction
Example
iaddnc.w #$a002,d2
Instruction Formats and Opcodes
Instruction Fields
Dn
FFF
Single Source/Destination Data Register
IADDNC.W #s16,Dn
Sign-extends the 16-bit immediate value to 40 bits and adds it to the destination data register Dn. The
result is not affected by the arithmetic saturation mode. The carry bit is not affected by this instruction.
This instruction is an integer (non-saturating) version of ADDNC.W.
Register Address
Bit Name
Description
EMR[2]
DOVF
Set if the result cannot be represented in 40 bits.
Ln
L
Clears the L bit in the destination register.
Register/Memory Address
Before
After
L2:D2
$1:$FFFFFFCA3E
$0:$FFFFFF6A40
EMR
$00000000
Instruction
Words Cycles Type
Opcode
15
8
7
0
IADDNC.W #s16,Dn
2
1
4
0
0
1
1
1
0
1
0
i
i
i
1
0
F
F
F
1
0
0
i
i
i
i
i
i
i
i
i
i
i
i
i
000
D0
010
D2
100
D4
110
D6
001
D1
011
D3
101
D5
111
D7
Note:
If registers D8–D15 are accessed instead of D0–D7, a prefix is used.
#s16
iiiiiiiiiiiiiiii
16-bit signed immediate data