Freescale Semiconductor StarCore SC140 - Manual (Page 543)

LSRR
SC140 DSP Core Reference Manual A-229
Status and Conditions Changed by Instruction
Example 1
lsrr d4,d2
Example 2
lsrr d4,d2
Register Address Bit Name Description
SR[0] C Bit (N – 1) of Dn is stored in the C bit for a right shift. Or, bit
(40 – |N|) of Dn is stored in the C bit for a left shift.
Ln L Clears the Ln bit in the destination register.
Register/Memory Address Before After
D4 $FF FFFF FFFE
SR $00E4 0000 $00E4 0001
L2:D2 $0:$FF 8765 4321 $0:$FE 1D95 0C84
Register/Memory Address Before After
D4 $00 0000 0002
SR $00E4 0000 $00E4 0000
L2:D2 $0:$FF 8765 4321 $0:$3F 1ED9 50C8
1 1 1 1
1
C
1 1 1 1 1 0 0 0 0 1 1 1 0 1 1 0 0 1 0 1 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1
1 1 1 1 1 1 1 0 0 0 0 1 1 1 0 1 1 0 0 1 0 1 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 0
0
1
6 3
2 3
9
0
C
0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 0 1 1 0 0 1 0 1 0 1 0 0 0 0 1 1 0 0 1 0 0 0
0
1
6 3
2 3
9
1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 0 1 1 0 0 1 0 1 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1