Bitwise complement (dalu), Instruction formats and opcodes instruction fields, Operation assembler syntax – Freescale Semiconductor StarCore SC140 User Manual
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SC140 DSP Core Reference Manual
NOT
NOT
Bitwise Complement (DALU)
NOT
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example
not d4,d5
Instruction Formats and Opcodes
Instruction Fields
Dn
FFF
Single Source/Destination Data Register
Operation
Assembler Syntax
~Da
→ Dn
NOT Da,Dn
NOT Da,Dn
Replaces the contents of the destination data register (Dn) with the 40-bit one’s complement of the source
data register (Da).
Register Address
Bit Name
Description
Ln
L
Clears the Ln bit in the destination register.
Register/Memory Address
Before
After
D4
$FF FFFF FFFB
L5:D5
$0:$00 0000 0004
Instruction
Words Cycles Type
Opcode
15
8
7
0
NOT
Da,Dn
1
1
2
1
1
0
1
1
0
F
F
F
0
0
0
0
J
J
J
000
D0
010
D2
100
D4
110
D6
001
D1
011
D3
101
D5
111
D7
Note:
This instruction can specify D8-D15 as operands by using a prefix.