Freescale Semiconductor StarCore SC140 - Manual (Page 421)

BSRD
SC140 DSP Core Reference Manual A-107
BSRD
Branch to Subroutine Using a Delay Slot (AGU)
BSRD
Description
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
None.
Example
Operation Assembler Syntax
(next* PC)
→ (SP); SR → (SP + 4); SP + 8 → SP;
PC + displacement
→ PC, (next* PC)→RAS
BSRD <label
BSRD >label
BSRD <label
BSRD >label
Executes the execution set in the delay slot, then pushes the next* PC (the PC of the execution set after the
delay slot) and SR onto the stack, and causes program execution to continue at location PC + displacement.
The displacement, calculated by the assembler and linker, is a two’s complement integer that represents the
relative distance from the current PC to the destination label. The assembler and linker determines if the PC
relative displacement is a short branch (
<label [–2
8
≤ displacement < 2
8 , W]) or a long branch (
>label [–2
20
≤ displacement < –2
8 , W and 2 8
≤ displacement < 2
20 , W]). In addition to being pushed onto the stack, the
next* PC is stored in the RAS register, and RAS becomes valid.
Register Address Bit Name Description
SR[18] EXP Determines the stack pointer used in instructions that have a stack
pointer as an operand.
Source Code Comments
move.l #$30,r0 ;loads r0 to later initialize sp
move.l #$40,r1 ; loads r1 to later initialize osp
tfra r0,sp ; initializes sp, sp is esp in this example
tfra r1,osp ; initializes osp, osp is nsp
nop
bsrd lbl3 ; branch to lbl3
move.w #$1234,r0 ; execute before the branch
nop
lbl3 add d0,d1,d2