Dmacss, Multiply signed by signed and, Operation assembler syntax – Freescale Semiconductor StarCore SC140 User Manual
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DMACSS
SC140 DSP Core Reference Manual
A-153
DMACSS
Multiply Signed By Signed and
DMACSS
Accumulate With Right Shifted Data Register (DALU)
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example
dmacss d2,d3,d5
Operation
Assembler Syntax
[Dn>>16] + Dc.H * Dd.H
→ Dn
(Dc signed, Dd signed)
DMACSS Dc,Dd,Dn
DMACSS Dc,Dd,Dn
Shifts Dn 16 bits to the right with bit 39 sign-extended into bits [39:24]. Adds the result to the product of
signed fractions in Dc.H and Dd.H. Places the result into Dn.
Dc and Dd are a data register pair. The operands are in the HP of each register.
This instruction is optimized for multi-precision-multiplication support.
Register Address
Bit Name
Description
Ln
L
Clears the Ln bit in the destination register.
Register/Memory Address
Before
After
D2
$00 0002 0000
D3
$00 0003 0000
L5:D5
$0:$00 0050 0000
$0:$00 0000 005C
EMR
$0000 0000
$00 0002 0000
2
-14
x $00 0003 0000
2
-14
+ 2
-15
$00 0000 000C
2
-28
+ 2
-29
+ $00 0000 0050
$00 0000 005C