Freescale Semiconductor StarCore SC140 - Manual (Page 619)

MOVES.L
SC140 DSP Core Reference Manual A-305
MOVES.L
Move Long to
MOVES.L
Memory With Scaling and Saturation (AGU)
Description
The data is scaled according to the scaling mode, and saturated if the Ln bit is set. The address register
values must be long word-aligned. This instruction is affected by by SM (Saturation Mode bit - SR[2]).
When SM is set, scaling is not performed, and the scale bits S[1:10] have no effect
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
Example
moves.l d0,(r0)
Operation Assembler Syntax
Db
→ (EA)
MOVES.L Db,(EA)
MOVES.L Db,(EA)
Moves a saturated long word from a data register (Db) to a memory address pointed to by an address
register with an optional offset or post-increment.
Register Address Bit Name Description
MCTL[31:0] AM3–AM0 Address modification bits when updating R0–R7. Otherwise, the
instruction is not affected by MCTL.
SR[5:4] S[1:0] Scaling mode bits choose: no scaling, scale up one bit, or
scale down one bit.
Ln L Limited values are written to the destination if the Ln bit is set.
Register Address Bit Name Description
SR[6] S Scaling bit, set when the absolute value of the data moved (after
scaling and limiting) is greater than or equal to 0.25 and less than
0.75.
Register/Memory Address Before After
SR $00E0 0000 $00E0 0000
R0 $0000 0054
L0:D0 $1:$00 8000 0000
$00000054 $7FFF FFFF