Instruction formats and opcodes, Move.l d0,(r0) – Freescale Semiconductor StarCore SC140 User Manual
Page 595
MOVE.L
SC140 DSP Core Reference Manual
A-281
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
Example
move.l d0,(r0)
Instruction Formats and Opcodes
MOVE.L (SP+s15),C4
MOVE.L C4,(SP+s15)
Moves a 32-bit long word between a general register and a memory address pointed to by the active stack
pointer plus a 15-bit signed offset.
Register Address
Bit Name
Description
MCTL[31:0]
AM3-AM0 Address modification bits when updating R0–R7. Otherwise, the
instruction is not affected by MCTL.
SR[18]
EXP
Determines which stack pointer is used when the stack pointer is
an operand. Otherwise, the instruction is not affected by SR.
Register Address
Bit Name
Description
Ln
L
Clears the Ln bit in the destination register.
Register/Memory Address
Before
After
MCTL
$0000 0000
D0
$FF FFFF FFFA
R0
$0000 0084
$0084
$FFFF FFFA
Instruction
Words Cycles Type
Opcode
15
8
7
0
MOVE.L (a32),DR
3
1
3
0
0
0
0
H H H H A
A
A
a
a
w
1
0
MOVE.L DR,(a32)
0
0
1
A
A
A
A
A
A
A
A
A
A
A
A
A
1
0
a
a
a
a
a
a
a
a
a
a
a
a
a
a
15
8
7
0
MOVE.L (a16),C4
2
1
3
0
0
0
w D D D D A
A
A
0
1
0
D
1
MOVE.L C4,(a16)
1
0
0
A
A
A
A
A
A
A
A
A
A
A
A
A
15
8
7
0
MOVE.L (Rn+u3),DR
1
2
4
1
0
1
1
H H H H w
1
R R R
s
s
s