Freescale Semiconductor StarCore SC140 - Manual (Page 312)

7-62 SC140 DSP Core Reference Manual
NOP Definition
[INC D0NOP NOP]
is encoded as:
[1W prefix, INC, NOP]
and
[NOPNOP INC D0]
is encoded as:
[1W prefix, INC, NOP]
2. If a baseline VLES has a 1W or 2W prefix, a 1W embedded NOP is encoded for each source
NOP. For example:
[LPMARKAINC D0 NOP]
is encoded as:
[1W prefix, INC, NOP]
and
[INC D8NOP]
is encoded as:
[2W prefix, INC, NOP]
3. If a baseline VLES requires assembler padding for modulo alignment, a 1W embedded NOP
is encoded for each source NOP. For example:
[MOVE.W #s16,d0MOVE.W #s16,d1NOP NOP]
is encoded as:
[1W prefix, 2W MOVE, PAD, 2W MOVE, NOP, NOP]
4. If a VLES has only NOPs, the first source NOP is encoded as the VLES prefix. For example:
[NOPNOP NOP]
is encoded as:
[1W prefix, NOP, NOP]
5. If a baseline VLES has a NOP as the only instruction in a conditional subgroup, a 1W
embedded NOP is encoded for each source NOP. For example:
[IFT CLR D0IFF NOP]
is assembler mapped to the IFT prefix and encoded as:
[1W IFT prefix, CLR, NOP]
and
[IFT NOPIFF CLR D0 IFF INC D1 IFF MOVE.W (R0),D2]
is assembler mapped to the IFF prefix and encoded as:
[1W IFF prefix, CLR, INC, MOVE, NOP]
6. If a baseline VLES has a NOP with other instructions in a conditional subgroup, a 1W
embedded NOP is encoded for each source NOP in either subgroup. For example:
[IFT CLR D8IFF INC D1 IFF NOP]
is encoded as: