Sr write to sr status bit update -26 – Freescale Semiconductor StarCore SC140 User Manual
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SC140 DSP Core Reference Manual
Static Programming Rules
Rule SR.3
At least one VLES is required between a MOVE-like instruction that writes the SR register and the
following instructions that affect status bits in SR:
•
DI and EI
•
DOENn and DOENSHn
•
CONT/D, BREAK, and SKIPLS
Example 7-44. SR Write to SR Status Bit Update
move.l #<1,sr
di
; not allowed
bmclr #$ffff,sr.h
doen0 #<10
; not allowed
pop sr
cont _next
; not allowed
Rule SR.4
At least two VLES are required between an instruction that affects the DOVF status bit in EMR and a
MOVE-like instruction that reads or writes the EMR register.
The assembler-mapped instruction CLR Dn never affects the DOVF status bit, even though it is
implemented as SUB Da,Da,Dn. Therefore, this rule applies to the SUB instruction, but not to CLR (SUB
Da,Da,Dn is taken as CLR in this context).